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References

ENIAC Strategic Research Agenda (update 2007), http://www.eniac.eu/web/downloads/SRA2007.pdf

International Technology Roadmap for Semiconductors (ITRS), 2007 Edition, www.itrs.net

ENIAC (European Nanoelectronics Initiative Advisory Council) website:
www.eniac.eu  

Finnish ICT cluster nanotechnology vision work 2009 (organised by FinNano, the National Nanotechnology Programme of Finland), www.tekes.fi/eng/finnano

\"Advanced CMOS transistors in the nanotechnology era for high-performance, low-power logic applications\", Chau, R. at al., Solid-State and Integrated Circuits Technology, 2004, Volume 1, Issue, 18-21 Oct. 2004, Page(s): 26 - 30

ALD/ALE technology: T. Suntola, J. Antson, U.S. Patent 4,058,430, 1977

\"A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging. http://download.intel.com/technology/IEDM2007/HiKMG_paper.pdf

Hafnium-based Intel® 45nm Process Technology, http://www.intel.com/technology/45nm/?iid=tech_home+rhc_hafnium

Silicon R&D Pipeline at Intel,
http://www.intel.com/technology/silicon/research.htm?iid=tech_sil+rd

\"High-k/Ge MOSFETs for future nanoelectronics\", Materials Today, Vol. 11, Issues 1-2, January-February 2008, pages 30-38

\"Significance of Nanotechnology for Future Wireless Devices and Communications\", Ermolov V. et al, The 18th Annual IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, 2007.