reportInformation & Communication
1.8.5 ICT: Application Profile: Manufacturing Technologies
Short application description
Creating integrated circuits with smaller feature sizes is likely to involve improvements to existing manufacturing technologies, and the introduction of new techniques. Some of these technologies, such as atomic layer deposition and nano-imprint lithography are largely novel, nanotechnology-based approaches. Other approaches - extreme ultraviolet lithography (EUVL) - employ nanometre wavelengths but don't fit the classic definition of nanotechnology. For a more detailed description of the technologies in this field, please refer to the technology sector report ‘Manufacturing Technologies'.
The primary application is the manufacturer of electronic devices. This includes the fabrication of integrated circuits, memory elements, and other electronic components. Electronics has very demanding manufacturing environments, requiring high throughput, low defect rates, cost effectiveness - rather than low cost per se - and the ability to produce nanometre scale features on devices which then be integrated in larger systems.
The manufacturing process for an integrated circuit includes the following process steps:
- A layer of silicon dioxide is grown on a wafer
- The wafer is coated with a photoresist
- UV light is then used to pattern the wafer, with a mask shielding parts of the photoresist
- The photoresist that has been exposed to UV light is dissolved
- The silicon dioxide which is then uncovered is etched away
- The rest of the photoresist is then removed, leaving a silicon dioxide pattern.
- The process is then repeated to create another layer of features
- Exposed areas are then doped
- Further layers are created, with an IC typically consisting of 20 or more.
This is a simplistic description, but it illustrates the main elements; deposition of a material (such as Silicon Dioxide), patterning, etching and doping.
Atomic Layer Deposition is believed to be employed in the deposition phase of Intel's manufacturing process, in order to create high-k/metal gate dielectrics.
Nano Imprint Lithography is being considered to produce the insulating layers that are required to separate copper interconnects between transistors, and has been added to the 32 and 22nm nodes on the International Technology Roadmap for Semiconductors.
The resolution of a manufacturing technology refers to the feature sizes that can be patterned using this technology. Recalling that Intel currently produces integrated circuits with 45nm feature sizes, any new technology would need to demonstrate higher resolution (or vastly reduced costs). Nanoimprint lithography has used stamps with xxx feature sizes.
Defect Rate, typically measures as defects per square cm. Integrated circuit manufacturing is high defect intolerant, with a defect rate of xx leading to the rejection of the wafer. Other applications - such as the production of Flash memory - can be more tolerant to defects.
A number of factors can be responsible for the introduction of defects in the manufacturing process. The chemicals used to produce a device may leave contaminants on the wafer surface. The technology may also result in positive charging of the wafer, leading to a risk of electrostatic discharge.
In semiconductor fabrication, this is typically a measure of the number of the wafers than can be processed per hour. Production Nano Imprint Lithography systems from Obducat are capable of processing up to 30 wafers per hour, with an imprint area of 8".
In essence, the boundary condition is defined by the existing technology, on a combination of metrics. The overall production cost should be lower than an existing method, cost being a function of the production time and throughput, the defect rate, material and equipment requirements.
Sindre® 800 Nano Imprint Lithography System
Obducat's largest production NIL system includes process steps for applying the imprint stamp with consistent pressure, thermal or UV curing, and the use of polymer replicas of the master stamp, increasing the master's lifetime.
SUNALE TM P-SERIES ALD Process Tools
Picosun's P-series reactors are designed for production use, processing batches of 25-50 4" wafers. The reactors can be used for a wide variety of applications, including optoelectronics, MEMS, and semiconductor materials.
Economic Information and Analysis
A 2006 report by BCC Research gave the market value of nanopatterning tools and equipment at US$ 46.3 million, of which 74% was accounted for by Nano Imprint Lithography. The market value was project to rise to US$ 292.7 in 2010, the bulk of which (84%) would continue to be NIL. The largest single market was in semiconductor and electronic fabrication applications.
Another 2006 report by BCC gave the market value of ALD at US$ 214.1 million in 2005. This whole market figure included equipment, as well as materials.
Selected Key Companies Profiles
Obducat (http://www.obducat.com) was the first commercial provider of NIL equipment, having sold the first NIL machinery in 2001. The company is based in Sweden and is listed on the Nordic Growth Market. In addition to the production of NIL equipment, Obducat also sells Electron Beam Recorders (EBR) which are used to fabricate the master stamp.
Molecular Imprints (http://www.molecularimprints.com/) also sells patterning lithography equipment, under the trademark Step and Flash® imprint lithography (S-FIL®). The company's largest system, the Imprio® HD2200, produces 20nm pitch sizes with a throughput of 180 disks per hour.
NIL Technology, based in Denmark, fabricates nanolithography stamps and associated processing and consultancy services.
Beneq (http://www.beneq.com) based in Finland, is a provider of coating technologies, including ALD. The company has three reactor products for thermal and plasma ALD.
Picosun (http://www.picosun.com) sells Atomic Layer Deposition systems. Tuomo Suntola, the inventor of ALD, is a member of the board of Picosun.
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